This invention relates generally to level shifting circuits and, more particularly, to an output stage for receiving signals at emitter coupled logic (ECL) voltage levels and converting them to transistor logic (TTL) logic signals.
As is well known, integrated circuits and systems employing same have become highly sophisticated, and it is often necessary to convert signals produced by a first type of circuitry (e.g. ECL) to signals compatible with a second type of circuitry (e.g. TTL). In the past, it has been necessary to utilize a Schottky or gold doped process in order to produce an integrated circuit for converting ECL to TTL signals which performs at a desired high speed. Unfortunately, such processes are not always available or practical.
ECL circuitry may be considered to produce logical high voltages of approximately 4.6 volts and logical low voltages of approximately 4.2 volts while TTL circuitry produces logical high voltages of approximately 2.8 volts and logical low voltages of approximately 0.4 volts. Normally, circuitry for converting from one level to another employs level shifting resistors or zener diodes. In converting from ECL levels to TTL levels, however, it is necessary to shift down from approximately five volts to ground and therefore zener diodes are not acceptable since they break down at too high a voltage. Additionally, the use of level shifting resistors reduce the operational speed of the circuit. The speed characteristics may be improved somewhat through the use of capacitors; however, such capacitors require a large amount of silicon area and are therefore cumbersome.